IJFANS International Journal of Food and Nutritional Sciences

ISSN PRINT 2319 1775 Online 2320-7876

Low power high performance Hardware architecture for edge-oriented image Demosaicing

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P Srikanth Reddy

Abstract

Colour filter array interpolation, also known as demosaicking and ‘debayering,' is a crucial process in technology still camera systems for image restoration. This paper introduces an effective very-large-scale integration (VLSI) architecture for colour interpolation, as well as an edge-oriented demosaicking procedure. To capture the colour difference and edges, the architecture employs basic operations (addition, subtraction, transfer, and comparator), but also nearest nearby pixels. The proposed design only needs four lines of line buffering, resulting in a low hardware cost. Extensive tests showed that the proposed technique retained edge features and worked well quantify. Including performances of high visual consistency The proposed architecture achieved better image quality than previous VLSI implementations. According to the synthesis findings, the proposed design will process 200 million samples per second using Taiwan Semiconductor Manufacturing Company's 0.18-m technology.

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