This research presents a novel design and implementation of a low-power CMOS operational transconductance amplifier (OTA) with a focus on enhancing its common-mode rejection ratio (CMRR). OTAs are critical components in various analog and mixed-signal integrated circuits, such as amplifiers and filters, and their performance directly affects the overall system's efficiency and accuracy. In this work, the proposed OTA architecture utilizes advanced CMOS technology to achieve low power consumption while simultaneously improving the CMRR, which is essential for rejecting common-mode noise in the input signals.The design features a combination of innovative circuit techniques and topology optimizations that reduce power consumption significantly compared to conventional OTAs.Simultaneously, a rigorous analysis of CMRR limitations and challenges is undertaken to address issues such as transistor mismatch and other non-idealities that can compromise CMRR performance.