IJFANS International Journal of Food and Nutritional Sciences

ISSN PRINT 2319 1775 Online 2320-7876

UART Implementation using FPGA

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Dr. Mohini Sardey, Ms.Gayatri Kakade, Ms.Prajakta Panhale, Mr. Mayank Ingle

Abstract

The design and implementation of parallel communication are discussed in this study. As more data bits are transmitted simultaneously, the cost and complexity rise. Serial communication does away with this problem and produces successful long-distance communication outcomes. Serial communication protocols are sometimes referred to as UARTs (Universal Asynchronous Receiver Transmitters). The implementation of UART at various baud rates is included in this study. Baud rate generator, transmitter, and receiver are the three primary components of UART. Additionally, FPGA hardware boards are used for testing. Since the Virtex 5 board meets the requirements for our project, we used it for the UART testing. Verilog, a hardware- descriptive language, and the Xilinx ISE design suit 19.7 tool are used to create UARTs.

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